\doxysubsubsubsection{TIM Output Compare Idle State }
\hypertarget{group___t_i_m___output___compare___idle___state}{}\label{group___t_i_m___output___compare___idle___state}\index{TIM Output Compare Idle State@{TIM Output Compare Idle State}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___t_i_m___output___compare___idle___state_gad251b83b0e33ddd0ed2fb35aa747ef78}{TIM\+\_\+\+OCIDLESTATE\+\_\+\+SET}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31b26bf058f88d771c33aff85ec89358}{TIM\+\_\+\+CR2\+\_\+\+OIS1}}
\item 
\#define \mbox{\hyperlink{group___t_i_m___output___compare___idle___state_ga56505fe4142096454f1da97683ce8bc2}{TIM\+\_\+\+OCIDLESTATE\+\_\+\+RESET}}~0x00000000U
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___t_i_m___output___compare___idle___state_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___t_i_m___output___compare___idle___state_ga56505fe4142096454f1da97683ce8bc2}\index{TIM Output Compare Idle State@{TIM Output Compare Idle State}!TIM\_OCIDLESTATE\_RESET@{TIM\_OCIDLESTATE\_RESET}}
\index{TIM\_OCIDLESTATE\_RESET@{TIM\_OCIDLESTATE\_RESET}!TIM Output Compare Idle State@{TIM Output Compare Idle State}}
\doxysubsubsubsubsubsection{\texorpdfstring{TIM\_OCIDLESTATE\_RESET}{TIM\_OCIDLESTATE\_RESET}}
{\footnotesize\ttfamily \label{group___t_i_m___output___compare___idle___state_ga56505fe4142096454f1da97683ce8bc2} 
\#define TIM\+\_\+\+OCIDLESTATE\+\_\+\+RESET~0x00000000U}

Output Idle state\+: OCx=0 when MOE=0 \Hypertarget{group___t_i_m___output___compare___idle___state_gad251b83b0e33ddd0ed2fb35aa747ef78}\index{TIM Output Compare Idle State@{TIM Output Compare Idle State}!TIM\_OCIDLESTATE\_SET@{TIM\_OCIDLESTATE\_SET}}
\index{TIM\_OCIDLESTATE\_SET@{TIM\_OCIDLESTATE\_SET}!TIM Output Compare Idle State@{TIM Output Compare Idle State}}
\doxysubsubsubsubsubsection{\texorpdfstring{TIM\_OCIDLESTATE\_SET}{TIM\_OCIDLESTATE\_SET}}
{\footnotesize\ttfamily \label{group___t_i_m___output___compare___idle___state_gad251b83b0e33ddd0ed2fb35aa747ef78} 
\#define TIM\+\_\+\+OCIDLESTATE\+\_\+\+SET~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31b26bf058f88d771c33aff85ec89358}{TIM\+\_\+\+CR2\+\_\+\+OIS1}}}

Output Idle state\+: OCx=1 when MOE=0 